<div dir="ltr">Kumar - nicely done!<div><br></div><div>I'm looking forward to comparing your hardware based implementation concepts with the traditional microprocessor/ software based ones. Sounds like a cool bake off!
As much as I like to build stuff, it seems like one can cover more ground by living vicariously through others' exploits :-) </div><div><br></div><div>I always enjoyed getting FPGA designs to work and work - same could probably be said of software, but there's something about a hardware design that seems less likely to crash or hang. And speed - ooo la la! Back in the day It was really something to run 'complicated' logic circuits at 40 MHz. Nowadays - you could sample RF straight at the analog amplifier, and do everything from there to baseband in digital -> why not - grab an FPGA and do multi-protocol SDR. There's probably several FPGA libraries for that - maybe even open sourced libraries...</div><div><br></div><div>Ping my email if you like and we can catch up sometime.</div><div><br></div><div>Meanwhile - looks like I have homework to skim through a video, and revisit the difference between Verilog and what I saw years back...</div><div><br></div><div>Cool!</div><div><br></div><div>Carl</div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Nov 24, 2021 at 5:51 PM Thalanayar Muthukumar <<a href="mailto:tnkumar@gmail.com">tnkumar@gmail.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex"><div dir="auto">Wow Carl. You have had a wealth of FPGA experience.<div><br></div><div>Yesterday, I had my first hands on experience with FPGA on the ICEstick following Shawn Hymel’s video and got 5 LEDs on.</div><div><br></div><div><a href="https://youtu.be/gtkQ84Euyww" target="_blank">https://youtu.be/gtkQ84Euyww</a></div><div><br></div><div><img src="cid:17d545dfe544211b0811"><br><div dir="ltr"><br></div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr">I have this feeling that possibly 2 channel encoder plus PID plus LIDAR based localization can be implemented on the FPGA.</div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr"><br></div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr">I do not have the necessary FPGA experience to know whether I am in the right track.</div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr"><br></div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr">I used Verilog and open source Apio tool chain as that is what Shawn used in his YouTube video.</div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr"><br></div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr">Love to kick ideas around with you Carl. I have a lot to learn.</div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr"><br></div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr">Regards.</div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr">- Kumar</div><div id="gmail-m_8455308517814816656AppleMailSignature" dir="ltr"><br></div><div dir="ltr">Sent from my iPhone</div><div dir="ltr"><br><blockquote type="cite">On Nov 24, 2021, at 5:17 PM, Carl Ott <<a href="mailto:carl.ott.jr@gmail.com" target="_blank">carl.ott.jr@gmail.com</a>> wrote:<br><br></blockquote></div><blockquote type="cite"><div dir="ltr"><div dir="ltr">Hi Kumar,<div><br></div><div>FWIW - </div><div><br></div><div>I considered myself quite good with FPGAs - </div><div><br></div><div>Circa 1990 ~ 1997.</div><div><br></div><div>I coded relatively large (at the time) Xilinx and Altera FPGAs (e.g. 256 pins per device and thousands of gates) - and was able to run them at nearly full utilization and max speed over mil-spec temperature ranges - yet maintain pin assignments regardless of design changes...</div><div><br></div><div>I managed to do that with a mix of functional simulation and static timing analysis tools. At the time, that was using (ASIC focused) Mentor Graphics tools on SUN workstations (with mostly functional FPGA add-on tools)...</div><div><br></div><div>And then I veered away from that path when I moved to Nokia and learned to "design in PowerPoint" (teams/organizations/products/marketingAndProductLaunchCampaigns)..</div><div><br></div><div>I'm sure certain bits of that FPGA knowledge remain quite relevant - but - it's probably a safe bet to guess that a few things might have changed a little since then...</div><div><br></div><div>FWIW - after starting briefly via schematic entry, I quickly migrated to VHDL and highly recommend VHDL or similar language if you're interested. In retrospect, I imagine that coding hardware in VHDL could leverage quite similar / analogous design patterns to coding software in an asynchronous / event driven environment like node.js. That's a hypothesis I'd like to validate at some point...<br></div><div><br></div><div>I haven't yet hit a DPRG level robot target where I've seriously considered an FPGA. But I'm very interested to kick ideas around if you're willing...</div><div><br></div><div>Best,</div><div>Carl</div><div><br></div><div><br></div></div><br><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Wed, Nov 24, 2021 at 4:46 PM Thalanayar Muthukumar via DPRGlist <<a href="mailto:dprglist@lists.dprg.org" target="_blank">dprglist@lists.dprg.org</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">Has anyone used FPGAs in their robots?<br>
I got myself an ICEstick to learn FPGAs and wanted to check if anyone in the group has experience with FPGAs.<br>
<br>
Regards.<br>
- Kumar<br>
<br>
Sent from my iPhone<br>
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